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  T6K01 2002-01-07 1 toshiba cmos digital integrated circuit silicon monolithic T6K01 column driver lsi for a dot matrix graphic lcd the T6K01 is a column (segment) driver for a dot matrix graphic lcd. the T6K01 offers low power consumption, due to the cmos si-gate process. it is designed to interface directly with a microprocessor unit (mpu). a program running on the mpu can drive the T6K01 asynchronously. the T6K01 stores data transferred from the mpu in its built-in ram. the data stored in the built-in display ram corresponds to the image on the lcd screen; the data is converted into the lcd drive signal. a configuration of two T6K01s and one t6c03 can be used to drive a 480 160-dot lcd. features  dot matrix graphic lcd column driver with display ram  display ram capacity: 160 lines 240 outputs = 38400 bits  lcd drive output: 240  interface: 8-bit mpu  relation between ram data and display ram bit data = 1 display on ram bit data = 0 display off  display off function  low power consumption  logic power supply: 2.7 to 3.3 v  lcd power supply: 8.0 to 26.0 v  cmos process  package: tcp (tape carrier package)
T6K01 2002-01-07 2 block diagram
T6K01 2002-01-07 3 pin assignment note: the above diagram shows the pin configuration of the lsi chip; it does not show the configuration of the tape carrier package.
T6K01 2002-01-07 4 pin functions pin name pin no. i / o functions seg1 to seg240 46 to 285 output column driver outputs c l 10 input shift clock pulse fp 11 input display synchronous signal fr 12 input frame signal db0 to db7 13 to 20 i / o data bus ad0 to ad12 21 to 33 input address bus r / w 34 input read / write select r / w = h read selected r / w = l write selected / ce 35 input chip enable data write: data write enabled on rising edge of / ce data read: data read out while / ce is at l level / dspof 36 input display off. usually connected to v dd . / dspof = h: display ? on mode. (seg1 to seg240) are operational. / dspof = l: display ? off mode. (seg1 to seg240) are at the v ss level. / rst 37 input reset signal: / rst = l reset state dir 38 input data direction select / test1, 2 8, 9 input  test pin. usually connected to v dd v dd , v ss 7, 39 D power supply v ccl , v ccr v lc0l , v lc0r v lc2l , v lc2r v lc3l , v lc3r v lc5l , v lc5r hv ssl , hv ssr 1, 45 2, 44 3, 43 4, 42 5, 41 6, 40 D power supply for lcd drive
T6K01 2002-01-07 5 function of each block ram cell the ram capacity is 160 lines 240 outputs for a total of 38400 bits. dir this circuit changes the data flow direction and page selection sequence. address decoder this decoder selects one ram address for read / write operation. 8-bit counter + decoder the decoder selects one ram cell from the 160 address lines for display operation. latch the data is latched from the display ram on the falling edge of c l . column driver circuit and lcd voltage generation circuit the T6K01 has 240 column drivers and four different lcd drive output voltage levels. the display data from the latch circuit and the m signal determine which of the four lcd drive voltages is selected. this circuit is shown in the following diagram. relation between fr, data input and output level / dspof fr input data (ram data) output level l * * v ss / v lc5 h l l v lc3 h l h v ss / v lc5 h h l v lc2 h h h v lc0 *: invalid
T6K01 2002-01-07 6 the relation between dir and the memory map (1) dir = h
T6K01 2002-01-07 7 (2) dir = l
T6K01 2002-01-07 8 absolute maximum ratings (ta = 25c) item symbol rating unit supply voltage (1) v dd (note 2) ? 0.3 to 6.5 v supply voltage (2) (note 1, 2) ? 0.3 to 28.0  v input voltage v in (note 2, 3) ? 0.3 to v dd +0.3 v operating temperature t opr ? 20 to 75 c storage temperature t stg ? 55 to 125 c note 1: v ccl , v ccr , v lc0l , v lc0r , v lc2l , v lc2r , v lc3l , v lc3r , v lc5l and v lc5r note 2: referenced to v ss , hv ssl and hv ssr note 3: applies to all data bus and i / o pins. note 4: ensure that the following condition is always maintained. v ccl / r v lc0l / r vlc2l / r vlc3l / r v lc5l / r hv ssl / r
T6K01 2002-01-07 9 electrical characteristics dc characteristics test conditions (unless otherwise noted, v ss = 0 v, v dd = 3.0 v 10%, v ccl / r = 23.0 v 10%, ta = ? 20 to 75c) item symbol test circuit test condition min typ. max unit pin name operating supply (1) v dd D D 2.7 D 3.3 v v dd operating supply (2) v cc D D 8.0 D 26.0 v v ccl , v ccr h level v ih D D 0.7 v dd D v dd v input voltage l level v il D D 0 D 0.3 v dd v db0 to db7 ad0 to ad7, / rst, / dspof, / ce, r / w, d / i, c l , fp, fr, dir, / test h level v oh D i oh = ? 400 a v dd ? 0.4 D v dd v output voltage l level v ol D i ol = 400 a v ss D 0.4 v db0 to db7 column driver output resistance r col D load current = 100 a (note 4) D D  3.0 k ? seg1 to seg160 input leakage i il D v in = v dd to v ss ? 1  D  1 a db0 to db7 ad0 to ad7, / rst, / dspof, / ce, r / w, d / i, c l , fp, fr, dir, / test operating freq. f cl D D 10 D  50 khz c l current consumption (1) i ss1 D (note 1) D  410 520 a  v ss , hv ssl , hv ssr , v lc5l , v lc5r current consumption (2) i ss2 D (note 2) D  45 65 a  v ss , hv ssl , hv ssr , v lc5l , v lc5r current consumption (3) i ss3 D (note 3) ? 1  D  1 a  v ss , hv ssl , hv ssr , v lc5l , v lc5r note 1: current consumption while internal data receiver is operating v dd = 3.0 v 10%, v ccl / r = 23.0 v, ta = 25c, 1 / 13 bias, 1 / 160 duty, no load, f fp = 70 hz, f / ce = 5 mhz note 2: current consumption while internal data receiver is sleeping v dd = 3.0 v 10%, v ccl / r = 23.0 v, ta = 25c, 1 / 13 bias, 1 / 160 duty, no load, f fp = 70 hz, f / ce = 0 hz note 3: standby current consumption v dd = 3.0 v 10%, v ccl / r = 23.0 v, ta = 25c, no load, f fp = 0 hz, f / ce = 0 hz note 4: v ccl / r = v lc0l / r = 23.0 v, v lc2l / r = v cc 11 / 13, v lc3l / r = v cc 2 / 13, hv ssl / r = v lc5l / r = 0 v
T6K01 2002-01-07 10 ac characteristics (1) test conditions (unless otherwise noted, v ss = 0 v, v dd = 3.0 v 10%, ta = ? 20 to 75c) item symbol min max unit enable cycle time t cyce 250 D ns enable pulse width pweh 160 D ns enable rise / fall time t er , t ef D 20 ns address set-up time t as 0 D ns address hold time t ah 10 D ns data set-up time t ds 100 D ns data hold time t dhw 20 D ns data delay time t dd (note) D 180 ns  data hold time t dhr (note) 20 D ns  note: with load circuit connected load circuit
T6K01 2002-01-07 11 ac characteristics (2) display data test conditions (unless otherwise noted, v ss = 0 v, v dd = 3.0 v 10%, ta = ? 20 to 75c) item symbol pin name min max unit c l pulse width h t cwh c l 500 D ns c l pulse width l t cwl c l 500 D ns c l rise / fall time t r , t f c l D 50 ns fp set-up time t fsu fp 100 D ns fp hold time t fhd fp 100 D ns ac characteristics (3) item symbol condition min max unit c l -to-fp-margin time t cf 20 D ns fp-to-c l -margin time t fc 0 D ns
T6K01 2002-01-07 12 application circuit
T6K01 2002-01-07 13  toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handling guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc..  the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk.  polyimide base film is hard and thin. be careful not to injure yourself on the film or to scratch any other parts with the film. try to design and manufacture products so that there is no chance of users touching the film after assembly, or if they do , that there is no chance of them injuring themselves. when cutting out the film, try to ensure that the film shavings do not cause accidents. after use, treat the leftover film and reel spacers as industrial waste.  light striking a semiconductor device generates electromotive force due to photoelectric effects. in some cases this can cause the device to malfunction. this is especially true for devices in which the surface (back), or side of the chip is exposed. when designing circuits, make sure that devices are protected against incident light from external sources. exposure to light both during regular operation and during inspection must be taken into account.  the products described in this document are subject to the foreign exchange and foreign trade laws.  the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba corporation for any infringements of intellectual property or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any intellectual property or other rights of toshiba corporation or others.  the information contained herein is subject to change without notice. 000707ebe restrictions on product use


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